Compatibility
With special ICs or several ranks, experience has shown that it can take longer for the system to complete the RAM training (Q-code 15 with AM5) during POST. In this respect, I was pleasantly surprised that the process with these dual-rank 8 Gbit H-Die modules only takes around 2 minutes, similar to other dual-rank DDR5 kits. So that’s fine.
The modules start without further configuration with DDR5-4800 40-40-40-84 at 1.1 V according to the JEDEC profile. Actually, 5200 or 5600 would not be a problem for this platform and ICs of this generation, but these are rejects with quality defects and this is probably why Patriot uses the older, more conservative profile.
Loading the XMP profiles using A-XMP on our MSI mainboard works without any problems and after a single training session, Memory Context Restore also works as desired, so that POST times are significantly shorter. I have already said a few words about the usefulness of the 3 very similar XMP profiles with 6400, 6200 and 6000 Mbps in the SPD information. Instead of the 6200 profile, perhaps a 5600 profile JEDEC-style would make sense. After all, modern AMD and Intel CPUs support DDR5-5600 for a dual-rank per channel (2R) setup.
Overclocking – DDR5-6400 26-8-37-31-34 at 1.7 V VDD
If we manually tinker with the clock and timings, the 8 Gbit H-dies clock almost exactly like 16 Gbit A-dies from SK Hynix. The tolerance and scaling with higher voltages is also comparable, so that I was ultimately able to use 1.7 V VDD for the final OC config. VDDQ effectively plays no role for OC, but should not be more than 300 mV away from VDD. Together with VDDIO, 1.45 V is therefore set here. Of course, such high voltages are not reasonable for everyone’s good conscience, but I want to show the maximum potential of the ICs.
Incidentally, 1.7 V is also absolutely necessary for tCL 26 at 6400 Mbps – 1.69 V is actually not stable over several hours in the stress test. A 120 mm fan with approx. 1000 rpm was placed directly on the modules for cooling. The remaining timings are more or less typical for Hynix ICs of this generation. tRFC can be pushed a little further, probably due to the halved capacity of the individual ICs. This would go even lower to tRFC 300, but then performance is lost to the on-die ECC.
Overall, the overclocking potential of these ICs is not on the same level as e.g. highly selected 16 Gbit A-Dies sold in new DDR5-6000 CL26 kits, but that was to be expected. Nevertheless, the ICs clock better than my old reference kit with 16 Gbit A-dies from 2023. This shows that SK Hynix continuously improves the production processes over the lifetime of an IC and thus constantly increases the quality of the chips produced. After 2 years, even the rejects clock slightly better than the top bin at the start of production. This is why my H16A reference config “only” runs with DDR5-6400 and tCL 28.
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